Contents 8
Contributors 14
Preface 18
1 Wireless communications and transceivers: an overview 20
1.1 Wireless and mobile communications 20
1.2 Integrated circuit technologies for wireless systems 21
1.3 Transceivers for wireless and mobile communications 21
1.4 Challenging topics in communication circuits and systems 22
1.5 Summary of chapters 26
2 Non-complex signal processing in a low-IF receiver 28
2.1 Introduction 28
2.2 Evolution of integrated receiver architectures 29
2.3 Digitising a conventional low-IF architecture 31
2.4 Performance requirements 32
2.5 Receiver dimensions 34
2.6 The change to non-complex signal processing 37
2.7 System simulations 46
2.8 Incorporation in a dual-mode receiver 49
2.9 Conclusions 51
2.10 References 51
3 A reconfigurable baseband chain for 3G wireless receivers 54
3.1 Introduction 54
3.2 Low-noise fully differential voltage buffer 54
3.3 Reconfigurable baseband chain for 3G receivers 67
3.4 Conclusions 70
3.5 References 71
4 Field-programmable and reconfigurable analogue and mixed-signal arrays 72
4.1 Introduction 72
4.2 Field-programmable analogue arrays (FPAA) 73
4.3 Commercial FPAA products 79
4.4 Continuous-time CMOS OTA-C FPAA for high frequencies 83
4.5 FPMA and SoPC 90
4.6 Reconfigurable universal transceivers using FPAAs 92
4.7 Conclusions 94
4.8 References 95
5 A low-power, low-voltage Bluetooth channel filter using class AB CMOS transconductors 100
5.1 Introduction 100
5.2 Filter synthesis 101
5.3 Class AB CMOS transconductor 105
5.4 Filter design 114
5.5 Performance 116
5.6 Conclusions 122
5.7 References 122
6 Design and automatic tuning of integrated continuous-time filters 124
6.1 Introduction 124
6.2 Filters in transceivers and the need for tuning 125
6.3 Filter architectures and design methods 128
6.4 On-chip tuning of continuous-time filters 150
6.5 Conclusions 164
6.6 References 166
7 Low-voltage integrated RF CMOS modules and frontend for 5 GHz and beyond 170
7.1 Introduction 170
7.2 A versatile low-voltage CMOS LNA topology 171
7.3 A CMOS VCO architecture suitable for sub-1 volt GHz-range applications 187
7.4 A very low-voltage (0.8 V) 5 GHz CMOS receiver frontend 198
7.5 Conclusions 205
7.6 References 206
8 Design of integrated CMOS power amplifiers for wireless transceivers 210
8.1 Introduction 210
8.2 Power amplifiers (PAs): concepts and challenges 211
8.3 Power amplifier controllability and stability 227
8.4 Recent progress in RF CMOS PA design 229
8.5 Conclusions 231
8.6 References 231
9 Parasitic-aware RF IC design and optimisation 234
9.1 Introduction 234
9.2 On-chip inductor modelling 235
9.3 Parasitic-aware optimisation 239
9.4 RF circuit syntheses 250
9.5 Conclusions 258
9.6 References 261
10 Testing of RF, analogue and mixed-signal circuits for communications: an embedded approach 264
10.1 Introduction 264
10.2 Some analogue performance metrics and test fundamentals 265
10.3 Translating design specifications into production test programmes 269
10.4 The (diminishing) role of test equipment 271
10.5 Embedded mixed-signal test cores 274
10.6 Circuit considerations and instrument performance evaluation 281
10.7 Measurement types and test examples 288
10.8 Conclusions 295
10.9 References 296
Index 300